1. Field of the Invention
The present invention relates to a digital PLL circuit which performs the adjustment of the oscillation frequency of a voltage-controlled oscillator constituting a PLL circuit by switching the capacitors in the voltage-controlled oscillator, and to a semiconductor integrated circuit incorporating the digital PLL circuit.
2. Description of the Related Art
There is a technology which allows reducing lock-up time and lowering sensitivity of frequency adjustment of a PLL circuit by bringing the oscillation frequency of a voltage-controlled oscillator (hereafter referred to as a VCO) closer to a desired frequency in advance by use of a tuning capacitor besides a variable capacity capacitor in the resonance circuit of the VCO.
In such a PLL circuit, since control is performed using a large number of tuning capacitors in the resonance circuit, selector switches of the same number as that of the capacitors are necessary. To get rid of such inconvenience, there is a method to reduce the numbers of capacitors and selector switches to be controlled by using two kinds of capacitors of different sizes, that is, capacitances and controlling them respectively in two times. Typically, the control is performed in the sequence from a coarse adjustment to a fine adjustment with the control by a capacitor with a larger capacitance being as a coarse adjustment interval and the control by a capacitor with a smaller capacitance being as a fine adjustment interval.
The frequency variable range of a VCO is determined by the capacitance of the tuning capacitor, and when an attempt is made to perform a control beyond the frequency variable range, a cycle slip will take place, thereby resulting in a malfunction. In the control using one kind of capacitor, since a malfunction is caused by an attempt to select an uncontrollable frequency range in actual operation, no problem will arise. However, when a two-step control is performed using two kinds of capacitors, a cycle slip will take place for each capacitor. Although there is no problem with a cycle slip which takes place in a fine adjustment interval because it is caused as a result of an uncontrollable frequency being set, a cycle slip in a coarse adjustment interval, which is performed before fine adjustment, will pose a problem in that the cycle slip will affect the control in the following fine adjustment interval. As a result, a cycle slip which takes in a coarse adjustment interval will cause a problem in that it decreases the frequency variable range of the voltage-controlled oscillator.
Note that regarding the control of oscillation frequency of a VCO in a PLL circuit, technologies such as those described in the following Patent Documents are disclosed.
Japanese Patent Application Laid-Open Publication No. 2006-135892 describes that a plurality of variable capacitance capacitors which are used in a resonance circuit of VCO are adjusted by one operation with a logically combined output.
Japanese Patent Application Laid-Open Publication No. 2007-67635 describes that the oscillation frequency of a VCO is adjusted by separating two lines of capacitances: a group of variable capacitance elements for frequency selection, and a group of variable capacitance elements for variation adjustment.
Japanese Patent Application Laid-Open Publication No. 2004-159222 describes that the oscillation frequency of a VCO is adjusted by a combination of capacitance elements arranged in parallel, each of which has a capacitance value, for example, magnified by a factor of n-th power of 2.
However, none of Patent Documents of Japanese Patent Application Laid-Open Publication Nos. 2006-135892, 2007-67635, 2004-159222 addresses the adjustment by switching between capacitors with different sizes for fine and coarse adjustment, nor can solve the above described problems due to a cycle slip when a two-step control is performed.